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october 2015 docid028379 rev 2 1 / 31 this is preliminary information on a new product now in development or undergoing evaluation. details are subject to change without notice. www.st.com rhfl6000a 2 a rad - hard adjustable positive voltage regulator datasheet - preliminary data features ? input voltage range from 2.5 v to 12 v ? 2 a guaranteed output current ? low dropout voltage: 0.3 v typ. @ 0.4 a ? embedded overtemperature and overcurrent protection ? adjustable ov ercurrent limitation ? output overload monitoring/signalling ? adjustable output voltage ? internal control loop accessible via an external pin, optional ? inhibit (on/off) ttl compatible control ? programmable output short - circuit current ? remote sensing operation ? rad - hard: guaranteed up to 300 krad m il - s td - 883 j method 1019. 9 high dose rate and 0.01 rad/s in eldrs conditions ? radiation environment ( set/sel/seb ) : - sel free @ let=120 mev*cm2/mg - set: less than 3.3% of v out @ 120 mev ? heavy ions set dedicated internal circuitry implemented for absorbing output transient ? operating junction temp erature range: - 55 c to 125 c description the rhfl6000a high - perfor mance adjustable positive voltage regulator provides exceptional radiation performance. it is tested in accordance with mil - std - 883j method 1019.9 , in eldrs conditions. the device is available in the flat - 16p, a hermetic ceramic package, and the qml - v die is specifically designed for space and harsh radiation environments. a dedicated internal circuitry is implemented for absorbing output transients during set events. the operating input voltage goes from 2.5 v to 12 v. table 1: device summary device quality level eppl package lead finish mass (g) rhfl6000akp1 engineering model - flat - 16p gold 0.70 RHFL6000AKP01V (1) qml - v flight target rhfl6000akp02v (1) qml - v flight target tin notes: (1) qualification ongoing. contact st sales office for information about the specific conditions for products in die form and other quality levels.
contents rhfl6000a 2 / 31 docid028379 rev 2 contents 1 diagram ................................ ................................ ............................ 5 2 pin configuration ................................ ................................ ............. 6 3 max imum ratings ................................ ................................ ............. 8 4 electrical characteristics ................................ ................................ 9 5 typical application diagram ................................ ......................... 12 6 radiations ................................ ................................ ...................... 13 6.1 total ionizing dose (mil - std - 883 test method 1019) ..................... 13 6.2 heavy ions ................................ ................................ ...................... 14 7 additional guidelines for set mitigation ................................ ..... 16 7.1 ground connections ................................ ................................ ........ 16 7.2 capacitor selection ................................ ................................ .......... 16 8 device description ................................ ................................ ......... 17 8.1 adj pin ................................ ................................ ........................... 17 8.2 inhibit on - off control ................................ ................................ .... 17 8.3 overtemperature protect ion ................................ ............................ 17 8.4 overcurrent protection ................................ ................................ .... 17 8.5 ocm pin ................................ ................................ .......................... 17 8.6 stab pin ................................ ................................ ......................... 18 8.7 filt c pin ................................ ................................ ....................... 18 9 applicati on information ................................ ................................ 19 9.1 notes on the 16 - pin hermetic flat package ................................ ...... 20 9.2 fpga supply ................................ ................................ ................... 20 10 typical performance characteristics ................................ ........... 21 11 package info rmation ................................ ................................ ..... 26 11.1 flat - 16p package information ................................ ....................... 26 12 ordering information ................................ ................................ ..... 28 12.1 traceability information ................................ ................................ ... 28 12.3 documentation ................................ ................................ ................ 29 13 revision history ................................ ................................ ............ 30
rhfl6000a list of tables docid028379 rev 2 3 / 31 list of tables table 1: device summary ................................ ................................ ................................ ........................... 1 table 2: pin description ................................ ................................ ................................ .............................. 7 table 3: absolute maximum rat ings ................................ ................................ ................................ ........... 8 table 4: thermal data ................................ ................................ ................................ ................................ . 8 table 5: electrical characteristics ................................ ................................ ................................ ............... 9 table 6: tid tests results ................................ ................................ ................................ .......................... 13 table 7: heavy ions results ................................ ................................ ................................ ...................... 14 table 8: bias configurations ................................ ................................ ................................ ..................... 15 table 9: test configurations ................................ ................................ ................................ ..................... 15 table 10: flat - 16p package mechanical data ................................ ................................ .......................... 27 table 11: order code ................................ ................................ ................................ ................................ 28 table 12: date codes ................................ ................................ ................................ ................................ 28 table 13: table of documentation by product ................................ ................................ .......................... 29 table 14: document revision history ................................ ................................ ................................ ........ 30
list of figures rhfl 6000a 4 / 31 docid028379 rev 2 list of figures figure 1: block diagram ................................ ................................ ................................ .............................. 5 figure 2: pin configuration (top view) ................................ ................................ ................................ ......... 6 figure 3: typical application diagram ................................ ................................ ................................ ....... 12 figure 4: heavy ions test configuration ................................ ................................ ................................ .... 14 figure 5: output voltage vs temperature ................................ ................................ ................................ .. 21 figure 6: output voltage vs temperature ................................ ................................ ................................ .. 21 figure 7: out put voltage vs temperature ................................ ................................ ................................ .. 21 figure 8: output voltage vs temperature ................................ ................................ ................................ .. 21 figure 9: line regulation vs temperature ................................ ................................ ................................ .. 22 figure 10: load regulation vs temperature (i out = 5 ma to 400 ma) ................................ ....................... 22 figure 11: load regulation vs temperature (i out = 5 ma to 1 a, v in = 2.5 v ................................ ............ 22 figure 12: dropout voltage vs. temperat ure (i out = 0.4 a) ................................ ................................ ....... 22 figure 13: dropout voltage vs temperature (i out = 1 a) ................................ ................................ ........... 23 figure 14: dropout voltage vs temperature (i out = 2 a) ................................ ................................ ........... 23 figure 15: quiescent current (off mode) ................................ ................................ ................................ 23 figure 16: qu iescent current (on mode, i out = 5 ma) ................................ ................................ ............. 23 figure 17: quiescent current (on mode, i out = 1 a) ................................ ................................ ................ 24 figure 18: quiescent current (on mode, i out = 2 a) ................................ ................................ ................ 24 figure 19: short circuit current vs r short ................................ ................................ ................................ . 24 figure 20: svr vs frequency ................................ ................................ ................................ .................... 24 figure 21: svr vs frequency (t = 90 c) ................................ ................................ ................................ . 24 figure 22: turn on transient ................................ ................................ ................................ ..................... 24 figure 23: turn off transient ................................ ................................ ................................ ..................... 25 figure 24: line transient (i out = 0.8 a, v out = 3 v) ................................ ................................ .................. 25 figure 25: line transient (i out = 2 a, v out = 2.5 v) ................................ ................................ .................. 25 figure 26: load transie nt ................................ ................................ ................................ .......................... 25 figure 27: stability area for ceramic capacitor ................................ ................................ ......................... 25 figure 28: stability area for tantalum capacitor ................................ ................................ ........................ 25 figur e 29: flat - 16p package outline ................................ ................................ ................................ ......... 26
rhfl6000a diagram docid028379 rev 2 5 / 31 1 diagram figure 1 : block diagram bandgap start-up/ cur r .gen. on-off control overload prot. therm al shutdown overcurrent monitoring antisaturating stage error a m p l. d r iv e r v o v i adj s t ab fi l t _c ocm r2 (ext.) r1 (ext.) i sc a b a b i nhibi t gipd25062015 1 147m t
pin configuration rhfl6000a 6 / 31 docid028379 rev 2 2 pin configuration figure 2 : pin configuration (top view) the upper metallic pack age lid is connected to ground. the bottom metallization is electrically floating . gipd25062015 1 148m t
rhfl6000a pin configuration docid028379 rev 2 7 / 31 table 2: pin description pin name flat - 16p pin description v o (1) 1, 2, 6, 7 output port of the regulator. v i (2) 3, 4, 5 input port of the regulator. gnd 12, 13 ground. i sc 8 current limit setting pin. connect a resistor between this pin and v i to set the current limit threshold. ocm 10 overcurrent monitor flag. open collector, internally pulled up. the signal on this pin goes to low logic level when the current limit activates. inhibit 14 device inhibit pin. internally pulled - down. the regulator is off when this pin is set at high logic level. adj 15 feedback pin. connect to external resistor divider for output voltage setting. filt c 9 filter capacitor pin. an opti onal capacitor can be connected between this pin and gnd. stab 11 an optional r - c network can be connected between this pin and gnd to tune the internal control loop. nc 16 not internally connected. notes: (1) all the ou t put pins must be connected together on the pcb. (2) all of input pins must be connected together on the pcb. the upper metallic package lid is connected to ground. the bottom metallization is electrically floating .
maximum ratings rhfl6000a 8 / 31 docid028379 rev 2 3 maximum ratings table 3: absolute maximum ratings symbol parameter value unit v i dc input voltage, v i - v ground - 0.3 to 12 v v o dc output voltage range - 0.3 to (v i + 0.3) v v adj adjustable pin voltage - 0.3 to (v o + 0.3) v i o continuous output current 2 a v ocm over current monitor pin voltage vs gnd - 0.3 to 12 v v isc current limit pin voltage vs gnd - 0.3 to 12 v inhibit inhibit pin voltage - 0.3 to 12 v stab stability capacitor pin voltage - 0.3 to 2.5 v filt c filter capacitor pin voltage - 0.3 to 1.3 v t stg storage temperature range - 65 to +150 c t op operating junction temperature range - 55 to +125 c esd human body model (hbm) 2 kv machine model (mm) 200 v charged device model (cdm) 500 v absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these condition is not implied. table 4: thermal data symbol parameter value unit r thjc thermal resistance junction - case, flat - 16p 8.3 c/w t sold maximum soldering temperature, 10 s 300 c
rhfl6000a electr ical characteristics docid028379 rev 2 9 / 31 4 electrical characteristics t j = 25 c, v i = 2.5 v, v o = v adj , c i = c o = 10 f (tantalum), unless otherwise specified. table 5: electrical characteristics symbol parameter test conditions min. typ. max. unit v i operating input voltage i o = 1 a, t j = - 55 to 125 c 2.5 12 v v adj reference voltage i o = 5 ma to 1 a, v o = v adj , t j = - 55 to 125 c 1.205 1.245 1.285 v i short output current limit (1) adjustable by external resistor 1 3 a ?v o /?v i line regulation v i = 2.5 v to 12 v, i o = 5 ma, t j = +25 c 0.1 0.4 % v i = 2.5 v to 12 v, i o = 5 ma, t j = - 55 c 0.2 0.5 v i = 2.5 v to 12 v, i o = 5 ma, t j = +125 c 0.08 0.35 ?v o / ?i o load regulation v i = 2.5 v, i o = 5 to 400 ma, t j = +25 c 0.02 0.4 % v i = 2.5 v, i o = 5 to 400 ma, t j = - 55 c 0.2 0.5 v i = 2.5 v, i o = 5 to 400 ma, t j = +125 c 0.03 0.3 v i = 2.5 v, i o = 5 ma to 1 a, t j = +25 c 0.3 0.5 v i = 2.5 v, i o = 5 ma to 1 a, t j = - 55 c 0.3 0.6 v i = 2.5 v, i o = 5 ma to 1 a, t j = +125 c 0.3 0.6 v i = 2.5 v, i o = 5 ma to 2 a, t j = - 55 to 125 c 0.6 z out output impedance i o = 100 ma dc and 20 ma rms 100 m? i q quiescent current (2) on mode v i = 2.5 v to 12 v, i o = 5 ma, t j = +25 c 7 ma v i = 2.5 v to 12 v, i o = 30 ma, t j = +25 c 7 v i = 2.5 v to 12 v, i o = 300 ma, t j = +25 c 30 v i = 2.5 v to 12 v, i o = 1 a, t j = +25 c 60 v i = 2.5 v to 12 v, i o = 30 ma, t j = - 55 c 7
electrical characteristics rhfl6000a 10 / 31 docid028379 rev 2 symbol parameter test conditions min. typ. max. unit v i = 2.5 v to 12 v, i o = 300 ma, t j = - 55 c 35 v i = 2.5 v to 12 v, i o = 1 a, t j = - 55 c 80 v i = 2.5 v to 12 v, i o = 30 ma, t j = +125 c 7 v i = 2.5 v to 12 v, i o = 300 ma, t j = +125 c 30 v i = 2.5 v to 12 v, i o = 1 a, t j = +125 c 60 i qoff quiescent current off mode v i = 2.5 v, v inh = 2.4 v, off mode, t j = - 55 to +125 c 0.2 1 ma v d dropout voltage i o = 400 ma, v o = 2.5 to 9 v, (+25 c) 300 450 mv i o = 400 ma, v o = 2.5 to 9 v, ( - 55 c) 250 400 i o = 400 ma, v o = 2.5 to 9 v, (+125 c) 350 550 i o = 1 a, v o = 2.5 to 9 v, (+25 c) 570 800 i o = 1 a, v o = 2.5 to 9 v, ( - 55 c) 470 700 i o = 1 a, v o = 2.5 to 9 v, (+125 c) 700 900 i o = 2 a, v o = 2.5 to 9 v, (+25 c) 550 i o = 2 a, v o = 2.5 to 9 v, ( - 55 c) 500 i o = 2 a, v o = 2.5 to 9 v, (+125 c) 700 v inh(on) inhibit voltage i o = 5 ma, t j = - 55 to +125 c 0.8 v v inh(off) inhibit voltage i o = 5 ma, t j = - 55 to +125 c 2.4 svr supply voltage rejection (3) v i = v o + 2.5 v 0.5 v, v o = 3 v i o = 5 ma f = 120 hz 60 70 db f = 33 hz 30 40 i sh shutdown input current v inh = 5 v 15 a v ocm ocm pin voltage sinked i ocm = 24 ma active low 0.38 v t plh inhibit propagation delay, turn - off (3) v i = v o + 2.5 v, v inh = from 0 v to 2.4 v, i o = 400 ma , v o = 3 v, c i = c o = 10 f 30 s
rhfl6000a electrical characteristics docid028379 rev 2 11 / 31 symbol parameter test conditions min. typ. max. unit t phl inhibit propagation delay, turn - on (3) v i = v o + 2.5 v, v inh = from 2.4 v to 0 v, i o = 400 ma , v o = 3 v, c i = c o = 10 f 100 s en output noise voltage (3) b = 10 hz to 100 khz, i o = 5 ma to 2 a 40 vrms notes: (1) these values are guaranteed by design. for each application it is strongly recommended to comply with the maximum current limit of the package used. (2) see table 6: "tid tests results" . (3) these values are guaranteed by design.
typical application diagram rhfl6000a 12 / 31 docid028379 rev 2 5 typical application diagram figure 3 : typical application diagram
rhfl6000a radiat ions docid028379 rev 2 13 / 31 6 radiations 6.1 total ionizing dose (mil - std - 883 test method 1019) the products that are guaranteed in radiation within rha qml - v system, fully comply with the mil - std - 883 test method 1019 specification. the rhfl6000a is being rha qml - v qualified, tested and characterized in full compliance with the mil - std - 883 specification, both below 10 mrad/s (low dose rate) and between 50 and 300 rad/s (high dose rate). ? testing is performed in accordance with mil - prf - 38535 and the test method 1019 of the mil - std - 883 for total ionizing dose (t id ). ? eldrs characterization is performed in qualification only on both biased and unbiased parts, on a sample of ten units from two different wafer lots. ? each wafer lot is tested at high dose rate only, in the worst bias case co ndition, based on the results obtained during the initial qualification. table 6: t id tests results type conditions value unit t id 50 rad(si) /s high dose rate up to 300 krad 10 mrad(si)/s low dose rate up to (1) 100 eldrs free up to (1) 100 output voltage radiation drift from 0 krad to 300 krad at 50 rad/s , mil - std - 883 j method 1019. 9 <1.1 ppm/krad quiescent current (on state) from 0 krad to 300 krad at 50 rad/s , mil - std - 883j method 1019. 9 v i = 2.5 v to 12 v, i o = 5 to 30 ma, t j = - 55 to +125 c <15 ma notes: (1) 300 krad low dose rate test ongoing.
radiations rhfl6000a 14 / 31 docid028379 rev 2 6.2 heavy ions the heavy ions trials are performed on qualification lots only. no additional test is performed. table 7 summarizes the results of heavy io ns tests. table 7: heavy ions results feature conditions value unit sel/b performance let = 120 mev * cm 2 /mg v i = 12 v n o l atchup/burnout - set performance during events let = 32 mev*cm2/mg saturated cross - section = 6.18*10 - 5 cm2 v in up to 9 v v i - v o 7.5 v i out < 300 ma 15% max over less than 300 ns % of v o let = 120 mev*cm2/mg v in up to 12 v v i - v o < 3.0 v i out < 300 ma no set above 3% let = 120 mev*cm2/mg v in up to 4 v v i - v o < 1.5 v i out < 1 a no set above 3.3% sel and set performances described here below are related to the circuit configuration and bias conditions shown in figure 4: "heavy ion test configuration" and table 8: "bias configurations " and table 9: "test configurations" . figure 4 : heavy ion s test configuration
rhfl6000a radiations docid028379 rev 2 15 / 31 table 8: bias configurations test mode bias condition sel v in = 12 v, v out = 9 v, v inhibit = 0 v, i out = 5 ma set v in = 3 v, v out = 1.5 v, v inhibit = 0 v, i out = 1 ma v in = 9 v, v out = 0 v, v inhibit = 9 v, i out = 0 ma v in = 4 v, v out = 2.5 v, v inhibit = 0 v, i out = 1 a v in = 7 v, v out = 5 v, v inhibit = 0 v, i out = 300 ma v in = 12 v, v out = 9 v, v inhibit = 0 v, i out = 300 ma table 9: test configurations test mode test configuration sel sel configuration c in1 = 100 f c out1 = c out2 = 47 f c in2 = c out4 = c out5 = 100 nf c byp = 47 nf c filt = 22 nf r isc = 8.2 k? r load = 1.8 k? set set 1 c in1 = 100 f c out1 = c out2 = 47 f c in2 = c out4 = c out5 = 100 nf c byp = 47 nf c filt = 22 nf r isc = 8.2 k? r load = depending on bias conditions set 2 c in1 = c out1 = 220 f c out5 = c out2 = not connected c in2 = c out4 = 100 nf c byp = 47 nf c filt = 22 nf r isc = 8.2 k? r load = depending on bias conditions
additional guidelines for set mitigation rhfl6000a 16 / 31 docid028379 rev 2 7 additional guidelines for set mitigation this section provides detailed design guidelines necessary to obtain the required performance against set. in this respect, we can identify two main areas for intervention: ground connection and external components selection. 7.1 ground connections to achieve the best performance in terms of output voltage accuracy, noise immunity and robustness against single event effects, it is recommended to implement a proper pcb layout by following the suggestions described below. according to qualitative simulations of single events, some very short set (i.e., a duration in the 100 ns range) are strongly dependent on the stray inductances versus gnd. the best solution to reduce t he parasitic inductance is the adoption of a gnd plane (with separate power and sense paths where possible). by minimizing the stray gnd impedance, this approach is of great assistance in controlling the amplitude of the set events near the load. if this s olution is not applicable, we suggest using a star - bus topology, where the pcb reference gnd connection is close to the gnd pin of the regulator. to achieve a good gnd sense, it is necessary to comply with the following rules: ? connect the regulator gnd pin and load gnd node both to the sense and power gnd traces on the pcb using vias to minimize the path; ? an array of multiple via structures works better than a single large one; ? for gnd connectors/plugs: use separate plugs for po wer supply and testing probes; ? connect input/output capacitors gnd terminals to gnd sense on the pcb. 7.2 capacitor selection with reference to figure 4: "heavy ion test configuration" , a combination of capacitors must be present on the input and output ports. for the input terminals, this may consist of a 100 f bulk capacitor (c in1 ) in parallel with a polyester 100 nf one (c in2 ) used for decoupling purposes. for each of the two output connections (pins 1, 2 and 6, 7) we suggest using a combination of a 47f bulk capacitor (c out1, c out2, ) in parallel with a polyester 100 nf one (c out4, c out5 ) for decoupling purposes. regarding parts se lection, for the 100 nf elements we suggest low - esl and low esr capacitors. concerning the selection of the three bulk capacitors, we suggest: ? using tantalum smd; ? selecting size and esl as small as possible; ? placing capacitors as close as possible to the i nput/output terminals; ? using an array of capacitors in parallel, where possible. this works better than a single capacitor against the short events.
rhfl6000a device description docid028379 rev 2 17 / 31 8 device description the rhfl6000a adjustable voltage regulator contains a pnp type power element controlled by a signal resulting from an amplified comparison between the internal temperature - compensated band - gap and the fraction of the desired output voltage value obtained from an external resistor divider bridge. the device is protected by several functional blocks. 8.1 adj pin the feedback voltage necessary for the loop regulation comes from the load through an external resistor divider (r1, r2 as in figure 3: "typical application diagram" ) whose mid point is connected to the adj pin (allowing all possible output voltage settings as per user requirements). 8.2 inhibit on - off control by setting the inhibit pin to ttl high level , the device switches off. the device is in on state when the inhibit pin is set low. since the inhi bit pin is pulled down internally, it can be left floating whenever the inhibit function is not used. 8.3 overtemperature protection a temperature detector inte rnally monitors the power element junction temperature. the device turns off when a temperature of approximately 175 c is reached, returning to on mode when the temperature decreases down to approximately 135 c. it should be noted that when the internal temperature detector reaches 175 c, the active power element can be as high as 225 c. prolonged operation under these conditions may exceed the maximum operating ratings and device reliability cannot be guaranteed. 8.4 overcurrent protection an default internal costant current limit is set at i short = 3 a (when v o is at 0 v). this value can be decreased via an external resistor (r short ) connected be tween the i sc and v i pins, with a typical value range of 10 k? to 200 k?. to maintain optimal regulation, it is necessary to set i short 1.6 times greater than the desired maximum operating current (i o ). when i o reaches i short C 300 ma, the current limiter intervenes, v o starts to drop and the ocm flag is raised. when no current limitation adjustment is required, the i sc pin must be left unbiased. the combination of overcurrent and overtemperature circuits provides rhfl6000a with a high level of protection a gainst destructive junction temperature excursions in all load conditions. 8.5 ocm pin the ocm pin is an open collector flag normally pulled up at v i by a 5 k? resistor. it goes t o low state when the current limit becomes active. it is buffered and can sink 10 ma.
device description rhfl6000a 18 / 31 docid028379 rev 2 8.6 stab pin the stab pin gives user direct access to regulator internal control loop stabil ity adjustment. its usage is optional and it should be left unconnected when not used. 8.7 filt c pin the filt c pin helps reduce set rate when bypassed to gnd through a 22 nf ceramic capacitor. its usage is optional and it should be left unconnected when not used.
rhfl6000a application information docid028379 rev 2 19 / 31 9 application information to adjust the output voltage, the r2 resistor m ust be connected between the v o and adj pins. the r1 resistor must be connected between adj and ground. resistor values can be derived from the following formula: where the minimum output voltage is therefore v adj and minimum input voltage is 2.5 v. th e rhfl6000a operates correctly when the v i - v o voltage difference is slightly above the power element saturation voltage (v d , dropout voltage). a minimum load current of 0.5 ma must be set to ensure proper regulation under no - load condition. it is advisab le to make this current flow into the resistor divider. for this reason, we suggest selecting an r1 value not higher than 10 k ?. the rhfl6000 flat16 package offers multiple input and output pins. all of the available v i pins should always be externally in terconnected. the same must be applied to all the available v o pins, otherwise the stability and reliability of the device cannot be guaranteed. the inhibit function switches off the output current very quickly. according to lenzs law, external circuitry reacts with ldi/dt terms which can be of high amplitude in case of serial inductive elements or large stray pcb inductance. large transient voltage would develop on both device terminals. it is advisable to protect the device output with schottky diodes to prevent negative voltage excursions. a14 v zener diode could protect the device input. the input and output capacitors must be connected as close as possible to the device terminals. since the rhfl6000a voltage regulator is manufactured with very high speed bipolar technology (6 ghz f t transistors), the pcb layout must be designed with exceptional care, with very low inductance and low mutually coupling lines. otherwise, high frequency parasitic signals may be picked up by the device resulting in system self - oscillation. on the other hand, the benefit of this technology is svr performance extended to high frequencies. a d j = 1 . 24 8 v t y p . v v o = v a d j ( r 1 + r 2 ) / r 1
application information rhfl6000a 20 / 31 docid028379 rev 2 9.1 notes on the 16 - pin hermetic flat package the rhfl6000a adjustable voltage regulator is available in a high thermal dissipation 16 - pin hermetic flat package, whose bottom flange is me tallized to allow direct soldering or glueing to a heat sink (efficient thermal conductivity). the upper metallic package lid is connected to ground. the bottom metallization is electrically floating . 9.2 fpga supply fpga devices are very sensitive to vdd transients beyond a few % of their nominal supply voltage (usually 1.5 v). the rhfl6000a includes specific integrated circuitry designed to absorb the output transients under heavy ion beams, rendering it suitable for safe fpga supply operation.
rhfl6000a typical performance characteristics docid028379 rev 2 21 / 31 10 typical performance characteristics (c in = c out = 10 f tantalum, unless othe rwise specified) figure 5 : output voltage vs temperature (v in = 2.5 v, i out = 5 ma) figure 6 : output voltage vs temperature (v in = 2.5 v, i out = 400 ma) figure 7 : output voltage vs temperature (v in = 2.5 v i out = 1 a) figure 8 : output voltage vs temperature (v in = 2.5 v i out = 2 a) gipd240620151357m t 1 . 18 1 . 19 1 . 2 1 . 21 1 . 22 1 . 23 1 . 24 1 . 25 1 . 26 1 . 27 1 . 28 -55 -40 -25 0 25 55 85 125 t e m pera t ure o c output voltage gipd240620151216m t 1 . 18 1 . 19 1 . 2 1 . 21 1 . 22 1 . 23 1 . 24 1 . 25 1 . 26 1 . 27 1 . 28 -55 -40 -25 0 25 55 85 125 t e m pera t ure o c output voltage gipd24062015 1 155m t 1 . 18 1 . 19 1 . 2 1 . 21 1 . 22 1 . 23 1 . 24 1 . 25 1 . 26 1 . 27 1 . 28 -55 -40 -25 0 25 55 85 125 t e m pera t ure o c output voltage gipd24062015 1 148m t 1 . 18 1 . 19 1 . 2 1 . 21 1 . 22 1 . 23 1 . 24 1 . 25 1 . 26 1 . 27 1 . 28 -55 -40 -25 0 25 55 85 125 t e m pera t ure o c output voltage
typical performance characteristics rhfl6000a 22 / 31 docid028379 rev 2 figure 9 : line regulation vs temperature figure 10 : load regulation vs temperature (i out = 5 ma to 400 ma) figure 11 : load regulation vs temperature (i out = 5 ma to 1 a, v in = 2.5 v figure 12 : dropout voltage vs. temperature (i out = 0.4 a) gipd24062015 1 125m t 0 0.1 0.2 0.3 0.4 0.5 0.6 -55 25 125 t e m pera t ure o c 0.7 0.8 lo a d r e gu l a ti on [ % ] gipd29062015 1 104m t 0 100 200 300 400 500 600 100 t e m pera t ure o c 120 140 -80 -60 -40 -20 0 20 40 60 80 d r opou t vo l t a ge [m v ] v out = 9v v out = 2 . 5v
rhfl6000a typical performance characteristics docid028379 rev 2 23 / 31 figure 13 : dropout voltage vs temperature (i out = 1 a) figure 14 : dropout voltage vs temperature (i out = 2 a) figure 15 : quiescent current (off mode) figure 16 : quiescent current (on mode, i out = 5 ma) gipd230620151442m t 500 600 700 800 900 100 t e m pera t ure o c 120 140 -80 -60 -40 -20 0 20 40 60 80 1000 400 100 200 300 0 i q o ff [ u a ] v in = 2.5 v , v inh = 2.4 v gipd24062015 1 103m t 0 100 200 300 400 500 600 100 t e m pera t ure o c 120 140 -80 -60 -40 -20 0 20 40 60 80 700 800 900 1000 d r opou t vo lt age [m v ] v out = 9v v out = 2 . 5v gipd230620151432m t 0.005 0.006 0.007 0.008 100 t e m pera t ure o c 120 140 -80 -60 -40 -20 0 20 40 60 80 0.004 0.001 0.002 0.003 0 i q [ a ] v in = 2.5 v gipd230620151454m t 500 600 700 800 900 1000 100 t e m pera t ure o c 120 140 -80 -60 -40 -20 0 20 40 60 80 1400 d r opou t vo l t a ge [m v ] 1500 1600 1300 1200 1100 400 v out = 9v v out = 2 . 5v
typical performance characteristics rhfl6000a 24 / 31 docid028379 rev 2 figure 17 : quiescent current (on mode, i out = 1 a) figure 18 : quiescent current (on mode, i out = 2 a) figure 19 : short circ uit current vs r short figure 20 : svr vs frequency figure 21 : svr vs frequency (t = 90 c) figure 22 : turn on transient gipd23062015 1 141m t 1.5 2 0 40 0.5 1 0 i sho rt [ a ] 2.5 3 3.5 4 r sh [ kohm ] 10 20 60 30 50 100 70 80 120 90 110 130 140 150 v en to gnd, c in =c out =1 f , v in =6 v , v out in short circuit condition gipd23062015 1 152m t 0.005 0.006 t e m pera t ure o c 125 -55 -25 0 25 55 85 0.004 0.001 0.002 0.003 0 i q [ a ] v in = 2.5 v gipd260620151051m t 0.05 0.06 t e m pera t ure o c 125 -55 -25 0 25 55 85 0.04 0.01 0.02 0.03 0 i q [ a ] v in = 2.5 v 0.07 0.08 0.09 0.1 0.11 0.12 gipd230620151047m t 100 10 20 0 svr [ db ] frequency [ hz ] 1000 10000 100000 v in = from 3.5 to 4.5 v , c in =c out =1f tantalum, t=90c, v out =2.5v 30 40 60 70 80 90 50 100 i ou t = 5 ma i ou t = 1 a gipd23062015 1 129m t 100 10 20 0 svr [ db ] frequency [ hz ] 1000 10000 100000 v in = from 5 to 6 v , v out =3 v , i out =5ma, c in =c out =1f tantalum 30 40 60 70 80 90 50 100
rhfl6000a typical performance characteristics docid028379 rev 2 25 / 31 figure 23 : turn off transient figure 24 : line transient (i out = 0.8 a, v out = 3 v ) figure 25 : line transient (i out = 2 a, v out = 2.5 v) figure 26 : load transient figure 27 : stability area for ceramic capacitor figure 28 : stability area for tantalum capacitor
package information rhfl6000a 26 / 31 docid028379 rev 2 11 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 11.1 flat - 16p package information figure 29 : flat - 16p package outline 8241681_4
rhfl6000a package information docid028379 rev 2 27 / 31 table 10: flat - 16p package mechanical data dim. mm inch min. typ. max. min. typ. max. a 2.42 2.88 0.095 0.113 b 0.38 0.48 0.015 0.019 c 0.10 0.18 0.004 0.007 d 9.71 10.11 0.382 0.398 e 6.71 7.11 0.264 0.280 e2 3.30 3.45 3.60 0.130 0.136 0.142 e3 0.76 0.030 e 1.27 0.050 l 6.35 7.36 0.250 0.290 q 0.66 1.14 0.026 0.045 s1 0.13 0.005
ordering information rhfl6000a 28 / 31 docid028379 rev 2 12 ordering information table 11: order code cpn quality level eppl package lead f inish marking (1) packing rhfl6000akp1 engineering model - flat - 16p gold rhfl6000kpa1 strip pack RHFL6000AKP01V (2) qml - v flight target flat - 16p gold tbd strip pack rhfl6000akp02v (2) qml - v flight target flat - 16p tin tbd strip pack notes: (1) specific marking only. the full marking includes in addition: - for the engineering models : st logo, date code, country of origin (fr) - for qml flight parts : st logo, date code, country of origin (fr), manufacturer code (cstm), serial number of the part within the assembly lot. (2) qualification ongoing. contact st sales office for informatio n about the specific conditions for : 1) products in die form 2) other quality levels 3) tape & reel packing 12.1 traceability information date code in formation is structured as described below: table 12: date codes model datecode em 3yywwn qml flight yywwn where: ? yy = year ? ww = week number ? n = lot index in the week
rhfl6000a ordering information docid028379 rev 2 29 / 31 12.3 documentation the table below gives a summary of the documentation provided with each type of products: table 13: table of documentation by product quality level documentation engineering model - qml - v flight certificate of conformance (including group c & d reference) precap report (100% high & low magnification) sem report screening summary group a summary (quality conformance inspection of electrical tests) group b summary ( quality conformance inspection of mechanical tests) group e (quality conformance inspection of wafer lot radiation verification test)
revision history rhfl6000a 30 / 31 docid028379 rev 2 13 revision history table 14: docu ment revision history date revision changes 21 - sep - 2015 1 first release. 12 - oct - 2015 2 updated table 7: "heavy ions results" . minor text changes.
rhfl6000a docid028379 rev 2 31 / 31 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and s t assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information se t forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics C all rights reserved

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